Lesson 1.1.1a

1.1.1a Processor components: ALU, control unit, registers and buses Quiz: OCR Computer Science, Unit 1

20 questions

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Lesson 1.1.1a, Processor components: ALU, control unit, registers and buses: 20 multiple choice questions for the OCR Computer Science (H446), Unit 1: The characteristics of contemporary processors, input, output and storage devices, written with Revision Ninja.

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The 20 questions

  1. Which CPU component decodes instructions and coordinates the timing of processor operations?

    • Control unit
    • ALU
    • Status register
    • Accumulator
  2. Which system bus carries memory addresses from the processor to main memory?

    • Address bus
    • Internal bus
    • Data bus
    • Control bus
  3. Which characteristic best describes the directional flow of signals on the data bus?

    • Unidirectional
    • Multidirectional
    • Bidirectional
    • Static
  4. Which bus transmits operational signals such as memory read, memory write, and clock pulse?

    • Data bus
    • Address bus
    • Expansion bus
    • Control bus
  5. What maximum memory capacity can be directly addressed by an 8-bit address bus?

    • 1024 bytes
    • 64 bytes
    • 8 bytes
    • 256 bytes
  6. Which component directly determines the word size that a processor can process in one go?

    • Address bus width
    • Clock rate
    • Data bus width
    • Cache size
  7. What collective term describes the combined address, data, and control buses in a computer?

    • Front side bus
    • Internal bus
    • Expansion bus
    • System bus
  8. Which operation is performed by the ALU during logical instruction execution?

    • FETCH
    • STORE
    • XOR
    • DECODE
  9. Which register transfers its contents directly to the address bus during instruction fetching?

    • Memory address register
    • Status register
    • Accumulator
    • Control unit
  10. Where is data copied from the MDR if it is an instruction?

    • CIR
    • ACC
    • PC
    • ALU
  11. Which control bus signal is sent by an I/O controller requesting CPU bus access?

    • Memory write
    • Interrupt request
    • Bus grant
    • Bus request
  12. How many memory addresses can a processor access if its address bus width is doubled from 16 bits?

    • 65,536
    • 4,294,967,296
    • 32
    • 131,072
  13. Which signal sent along the control bus coordinates the timing of all processor operations?

    • Interrupt request
    • Memory read
    • Clock pulse
    • Bus grant
  14. What type of bus is the address bus in terms of signal direction?

    • Unidirectional
    • Bidirectional
    • Multidirectional
    • Omnidirectional
  15. How many distinct memory locations can be directly addressed using a 10-bit address bus?

    • 20
    • 512
    • 1024
    • 10
  16. Which processor component performs binary shift operations and bitwise comparisons within the CPU?

    • Control Unit
    • Control Bus
    • Arithmetic Logic Unit
    • Memory Address Register
  17. Which control bus signal indicates the CPU has granted a device access to the buses?

    • Transfer Acknowledge
    • Interrupt Request
    • Bus Request
    • Bus Grant
  18. What part of an instruction stored in the Current Instruction Register specifies the action to perform?

    • Opcode
    • Vector
    • Address
    • Operand
  19. What type of signal on the control bus requests a temporary pause of CPU execution?

    • Clock Signal
    • Interrupt Request
    • Memory Write
    • Bus Request
  20. Which part of a machine code instruction contains the data or memory address to be manipulated?

    • Operand
    • Vector
    • Opcode
    • Register

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