Lesson 4.7.3.3

4.7.3.3 Instruction set and addressing modes Quiz: AQA Computer Science, Unit 7

20 questions

Written by Revision Ninja · Last reviewed 11 October 2026

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Lesson 4.7.3.3, Instruction set and addressing modes: 20 multiple choice questions for the AQA Computer Science (7517), Unit 7: Fundamentals of computer organisation and architecture, written with Revision Ninja.

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The 20 questions

  1. What is a processor's instruction set?

    • The set of memory addresses reserved for use by the operating system alone
    • The set of registers that a programmer is forbidden from changing
    • A list of software applications that run on any processor without change
    • The set of machine operations that a particular processor can carry out

  2. Why is an instruction set specific to a processor?

    • The instruction set depends only on the clock speed, so processors with equal clocks match
    • Each processor design defines its own opcodes and operations, so the same machine code differs between processors
    • The operating system sets the instruction set at boot time, so it varies from one boot to the next
    • Every processor shares one universal instruction set agreed by an international standards body

  3. What does an instruction consist of?

    • A status flag and a data bus
    • A register name and an interrupt request
    • An opcode and one or more operands
    • A clock signal and a memory address

  4. In the simple model with a 4-bit opcode (3 bits for the basic operation and 1 bit for the addressing mode), how many distinct basic operations can be encoded?

    • 16 (2^4)
    • 2 (2^1)
    • 4 (2^2)
    • 8 (2^3)

  5. With a 4-bit opcode, how many different opcodes are possible?

    • 16 (2^4)
    • 32 (2^5)
    • 8 (2^3)
    • 15, because one pattern is always reserved

  6. An 8-bit instruction has a 4-bit opcode and a 4-bit operand. How many distinct operand values can the operand field hold?

    • 4 (2^2)
    • 8 (2^3)
    • 16 (2^4)
    • 256 (2^8)

  7. Which description matches immediate addressing?

    • The operand is the data value itself
    • The operand is found by adding the program counter to a constant
    • The operand is a register that holds the address of the data
    • The operand is the address where the data is stored

  8. In direct addressing, what does the operand represent?

    • The address of the data, which is then read from memory or a register
    • The data value itself, copied straight into the instruction
    • A status flag that shows whether the data held at the address is valid
    • The address of the next instruction to be executed by the processor

  9. An instruction LOAD #20 uses immediate addressing. What value is placed into the register?

    • The value 20
    • The value stored at the address held in the MAR
    • The contents of memory location 20
    • The address 20, which becomes the next value of the PC

  10. An instruction LOAD 20 uses direct addressing. What value is placed into the register?

    • The value of the program counter at that moment
    • The contents of memory location 20
    • The value 20 itself, copied into the register
    • The address of the status register in the processor

  11. A design uses direct addressing with a 4-bit operand. How many distinct memory addresses can the operand name?

    • 256
    • 16
    • 4
    • 8

  12. Which addressing mode should be used to add the constant 7 to a register?

    • Immediate addressing, because 7 is the address of the next instruction
    • Direct addressing, because the 7 is stored in the status register
    • Direct addressing, because 7 is the address of the constant in memory
    • Immediate addressing, because the constant 7 is itself the operand

  13. Why does the simple model incorporate the addressing mode into the opcode bits?

    • Because the status register stores the addressing mode separately from each instruction
    • Because addressing modes cannot be represented in binary at all within an instruction
    • So the opcode defines both the basic operation and the addressing mode, keeping the model simple
    • Because the operand is always held in the MBR and never inside the instruction itself

  14. Which of these is a processor-specific feature?

    • The opcodes and addressing modes supported by a processor design
    • The file names used by the operating system to organise the files stored on a disk drive in a folder structure
    • The names of the source files that a compiler reads when it translates a program written in a high-level language
    • The high-level keywords used in a Python program, which are the same for every processor on which Python can be run

  15. A design uses 6-bit opcodes and 10-bit operands. What is the instruction length, and how many opcodes are possible?

    • 12 bits, and 64 opcodes
    • 18 bits, and 32 opcodes
    • 16 bits, and 64 opcodes
    • 16 bits, and 32 opcodes

  16. Why can an 8-bit direct operand not reference address 300?

    • 8 bits can represent only 256 values, so the addresses that can be named run from 0 to 255
    • Addresses above 100 can only be reached through immediate addressing, not direct addressing
    • Address 300 is reserved for the status register, so it cannot be named by any instruction
    • Direct addressing works only for values below 100 because of the clock frequency limit

  17. The instruction ADD R1, #5 uses which addressing mode for the value 5?

    • Immediate addressing into the program counter of the processor
    • Direct addressing into the status register of the processor
    • Direct addressing, because 5 is the address of a register
    • Immediate addressing

  18. Which statement about processor instruction sets is correct?

    • Two processors with different instruction sets may need different machine code for the same high-level program
    • Instruction sets are identical across all processors made by the same company, which allows software to move between them
    • Any machine code runs on any processor that has a clock, whatever the instruction set the processor was designed to use
    • An instruction set includes only the file names used by the operating system to locate programs on the storage device

  19. A processor has a 12-bit instruction word: a 4-bit opcode (3 bits for the operation and 1 for the addressing mode) and an 8-bit operand. How many distinct operations and addressing modes are encoded?

    • 12 operations and 4 addressing modes
    • 8 operations and 2 addressing modes
    • 4 operations and 8 addressing modes
    • 16 operations and 1 addressing mode

  20. In the simple model, an addressing-mode bit of 1 selects immediate addressing. Which part of the instruction does this bit belong to?

    • The program counter, since the mode decides where the next instruction is
    • The opcode, since the addressing mode is incorporated into the opcode bits
    • The status register, since the addressing mode is always recorded there
    • The operand, since the addressing mode is always stored in the operand bits

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