4.7.3.2 The fetch-execute cycle and registers Quiz: AQA Computer Science, Unit 7

The 20 questions

1. What are the three stages of the fetch-execute cycle?

   • Compile, link and run
   • Fetch, decode and execute
   • Read, write and interrupt
   • Load, store and halt

2. In the fetch stage, which register is first loaded with the address to be read?

   • The status register, loaded from the ALU
   • The CIR, loaded from the MBR
   • The MAR, loaded from the program counter
   • The PC, loaded from the MBR

3. What happens to the program counter during the fetch stage?

   • It holds the instruction and is copied into the CIR
   • It is loaded with the result of the last ALU operation
   • It is cleared to zero to prepare the processor for decoding
   • It is incremented so that it points to the next instruction

4. What is the role of the decode stage?

   • Memory is read to retrieve the next data item that the program requires, using the address held in the status register
   • The control unit interprets the opcode and operand in the CIR to determine the operation required
   • The ALU adds two numbers from registers and stores the answer back in main memory at the address held in the PC
   • The PC is set to the address of a subroutine that the program will call later, which is then stored in the status register

5. During the execute stage, what might the processor do?

   • Only clear the flags in the status register to their default values
   • Only store the instruction into secondary storage for later review
   • Perform an ALU operation, access memory, or change the PC for a branch
   • Only decode the next instruction held in the CIR at this time

6. A processor takes 3 clock cycles to fetch, 1 to decode and 2 to execute an instruction. How many cycles does each instruction take?

   • 6
   • 5
   • 3
   • 9

7. A program has 1,000 instructions, each taking 6 clock cycles, on a 2 MHz clock. How long does the program take to run?

   • 0.3 ms
   • 30 ms
   • 3 s
   • 3 ms

8. Which register holds the instruction after it has been read from memory and before it is decoded?

   • The current instruction register
   • The memory address register
   • The program counter
   • The status register

9. Why is the memory buffer register used during the fetch?

   • It temporarily holds the instruction or data that has been read from memory
   • It holds the address of the next instruction to be fetched from memory
   • It holds the processor's clock speed so that the timing can be checked
   • It holds the result of the last comparison made by the ALU

10. Which statement about the fetch-execute cycle is correct?

    • The cycle runs only when an interrupt occurs, and never during normal program flow
    • The cycle runs only on the status register, and not on the instructions in memory
    • The cycle repeats for every instruction until a halt instruction is executed
    • The cycle runs once per program, after which the processor restarts from the first instruction

11. A branch instruction is executed. Which register is changed so that the next fetch comes from the branch target?

    • The status register, which records the branch so that it can be repeated
    • The CIR, which is loaded with the branch twice so that it is decoded twice
    • The MBR, which is loaded with the branch address in place of the instruction
    • The program counter, which is loaded with the branch target address

12. The PC contains 1500 and the instruction is 2 bytes long with byte addressing. After the fetch, and before executing a non-branch instruction, what does the PC contain?

    • 1501
    • 1500
    • 1600
    • 1502

13. What happens to the PC when a conditional branch is not taken?

    • The PC is incremented as normal and execution continues sequentially
    • The PC is cleared, so execution restarts at address zero
    • The PC is loaded from the status register with the flags for the branch
    • The PC is decremented so that the same instruction runs again

14. A 'branch if zero' instruction is executed and the zero flag is set. Which action follows?

    • The instruction is written to the MBR so that it can be executed later
    • The PC is incremented as usual and the branch instruction is skipped entirely
    • The PC is loaded with the branch address, so the next instruction is fetched from there
    • The processor halts with an error because the zero flag should never be set

15. What does 'fetch' mean in the fetch-execute cycle?

    • Checking the input devices for an interrupt request from the keyboard
    • Writing the result of the last instruction to secondary storage
    • Converting the instruction from binary into assembly mnemonics
    • Reading the next instruction from main memory into the processor

16. Which sequence of register transfers is correct for the fetch followed by the decode?

    • CIR to MAR, MBR to PC, memory to the ALU, and then the ALU decodes the PC
    • PC to MAR, memory to MBR, MBR to CIR, PC increments, then the control unit decodes the CIR
    • MAR to PC, MBR to CIR, CIR to the ALU, and then the PC is sent to memory
    • PC to CIR, memory to MAR, MAR to MBR, and then the ALU decodes the CIR

17. Which of these is NOT one of the three stages of the fetch-execute cycle?

    • Decode
    • Fetch
    • Execute
    • Store

18. Why does the processor keep the instruction in the CIR during decoding rather than leaving it in the MBR?

    • The CIR stores the status flags that the MBR is unable to record for the operation, so the instruction must be held there
    • The MBR can hold only addresses and not instructions, so each instruction has to be stored in a separate register elsewhere
    • The MBR is cleared by the clock after every fetch, so any instruction left in it during decoding would be lost before it runs
    • The MBR may be needed for a new memory read, so the instruction must be kept safely in the CIR while it is decoded

19. Which step completes the execution of a simple ADD of two register values?

    • The result is written to the CIR, which is then fetched from memory as data
    • The result is written back to a register, and the cycle returns to fetch the next instruction
    • The result is written to the PC, which halts the processor at that address
    • The result is written to the MAR, which then decodes the addition for the ALU

20. A processor runs at 4 GHz, and each instruction takes an average of 8 clock cycles. How many instructions does it execute per second?

    • 3.2 x 10^10
    • 4 x 10^9
    • 5 x 10^8
    • 5 x 10^6

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